The invention relates to a timing signal generator producing system timing signals from a reproduced video format signal.
In the field of reproducing video format signals there has recently been developed a Still-With-Sound (SWS) system. In such a system, digitial audio data is recorded together with video data and control data on a recording disc. During playback, the audio data along with the video data are played back in response to the control data so as to add sound background to a corresponding still video display. An SWS processor for reproducing and processing audio and control data (hereinafter collectively referred to as "SWS data") has been developed for use in conjunction with an ordinary Video Disc Player (VDP).
For the SWS processor to operate properly, the system clock signal controlling the SWS processor must be in phase with the reproduced video signal. It is also important for the operator of the SWS system processor, when operating it in the manual mode, to be aware of whether or not the system clock signal controlling the SWS processor is synchronous with the reproduced video signal.